Jiangsu Changjiang Electronics Technology (JCET) has moved into volume production with its new 12-inch wafer bumping line. The line is located in an ISO Class 5 and 6 cleanroom space in the company’s assembly and test facility in Incheon, South Korea.
Production volumes are already being shipped to China-based JCET customers with several additional device manufacturers qualifying the line for shipments over the next few quarters.
Automotive, wireless, computing and other devices have already been qualified on this new bumping line which has now become an integral part of JCETs advanced flip chip packaging offerings in Korea. The line currently offers both lead-free and copper column bump types with bump pitches as tight as 90 μm and down to 40 μm possible.
“We are proud to offer an additional source for bumping within the JCET group of factories,” stated JCET CEO, Dr Heung Lee Choon. “The demand for bumping services as part of a full turnkey assembly and test solution continues to grow exponentially and this new line enables us to provide this value-added service at two of our regional manufacturing hubs,” continued Lee.
JCET’s campus in South Korea opened in 2015 and is a short drive from Incheon International Airport. This campus’ manufacturing facilities provide assembly and test of Flip Chip, Package-on-Package (PoP), Wafer-Level and Advanced System-in-Package solutions. JCET is the largest OSAT in China and the third-largest in the world with factories in China, South Korea and Singapore.
